1. Field of the Invention
The present invention relates to a level determination circuit, and more particularly, to a level determination circuit that determines a logic level of an input signal.
2. Description of the Background Art
Conventionally, a semiconductor integrated circuit device such as a semiconductor memory or a semiconductor logic circuit is provided with an input circuit for inputting a signal. When a fast and low-amplitude signal is used, a differential amplifier circuit is used at the first stage of the input circuit. The differential amplifier circuit compares the potential of a signal with a reference potential and transmits a signal of a logic level corresponding to the comparison result to the inside.
Moreover, there is an input circuit that changes an output level of the differential amplifier circuit in response to the logic level of an output signal in order to increase the response speed of the input circuit (see Japanese Patent Laying-Open No. 9-270700 for example).
Furthermore, there is an input circuit configured to select one of two differential amplifier circuits in accordance with whether or not the logic level of an output signal is changed (see U.S. Pat. No. 6,160,423 for example).
In a system having a bus structure with many branches, such as a memory system having a plurality of memories connected to the same data bus (see FIG. 1), however, a signal waveform is distorted by reflection occurring at a branch portion, producing a stepwise waveform in a signal input into a memory (see FIG. 9). Thus, a sufficient voltage margin cannot be secured between a potential of an input signal and a threshold potential of an input circuit, often causing the input circuit to incorrectly determine the logic level of the input signal.
It is difficult to avoid occurrence of such waveform distortion without deterioration in performance, since the waveform distortion is determined by a physical structure of a bus (the number and interval of branches, the width and interval of interconnection lines, wiring delay, line impedance and the like). Thus, the waveform distortion has been a cause of hindering reduction of voltage and increase of speed in the system with the bus structure.